The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 20, 2005
Filed:
Feb. 14, 2003
Arnett J. Brown, Iii, Chapel Hill, NC (US);
Robert J. Stalker, Haymarket, VA (US);
Rajen Naran Lakhani, Cary, NC (US);
Eric Wayne Neiderer, Newtown, PA (US);
Devin Bayles, Centreville, VA (US);
Arnett J. Brown, III, Chapel Hill, NC (US);
Robert J. Stalker, Haymarket, VA (US);
Rajen Naran Lakhani, Cary, NC (US);
Eric Wayne Neiderer, Newtown, PA (US);
Devin Bayles, Centreville, VA (US);
BAE Systems and Information and Electronic Integration, Inc., Nashua, NH (US);
Abstract
A library tool suite supplements conventional design tools to increase the speed, automation and accuracy of creating physical designs for a library of cells to be used in chip designs. The tool suite may include a post operations tool, an audit tool, a custom interface, a setup file and a place and route model preparation utility which interact with the conventional tools and design data to automate and ensure integrity of the physical design process. The tool suite facilitates automatically generating libraries corresponding to an overall cell plan, generating attributes defining strength of connection between possible pin placements within a cell to facilitate routing inter-cell nets through a cell, and auditing cells for errors prior to inclusion in a manufacturing library.