The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 20, 2005
Filed:
Dec. 19, 2002
Kenji Yamamoto, Kanagawa, JP;
Masaharu Mizuno, Kanagawa, JP;
Kazuhiro Nakajima, Kanagawa, JP;
NEC Electronics Corporation, Kanagawa, JP;
Abstract
A universal logic module that may have a reduced off-leak current in universal logic cells () not used as logic circuits has been disclosed. A universal logic module may include universal logic cells () that may be formed with a second wiring for connecting universal logic cells () from a base configuration formed with a first wiring. Unused universal logic cell () may include transistors in basic cells (A to E) that are non-connected to a power supply (VDD) and/or a ground potential (VSS). Furthermore, unused universal logic cell () may include transistors in basic cells (A to E) that may provide a capacitor between a power supply (VDD) and a ground potential (VSS). In this way, off-leak current may be reduced and noise on a power line and/or a ground line may be reduced.