The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 13, 2005

Filed:

Dec. 18, 2003
Applicants:

GA Won Lee, Ichon-Shi, KR;

Jae Hoon Choi, Seoul, KR;

Jae Chul OM, Ichon-Shi, KR;

Sung Wook Park, Sungnam-Shi, KR;

Jae Hee Lee, Ichon-Shi, KR;

Inventors:

Ga Won Lee, Ichon-Shi, KR;

Jae Hoon Choi, Seoul, KR;

Jae Chul Om, Ichon-Shi, KR;

Sung Wook Park, Sungnam-Shi, KR;

Jae Hee Lee, Ichon-Shi, KR;

Assignee:

Hynix Semiconductor Inc., Kyungki-Do, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L021/31 ; H01L021/469 ;
U.S. Cl.
CPC ...
Abstract

Provided is a method for manufacturing a semiconductor device including a plurality of different semiconductor elements with a transistor for fabricating the semiconductor device formed on a semiconductor substrate, an interlayer insulation film formed all over the upper part, and a hole trap site formed in the interlayer insulation film for preventing a mobile ion like H or moisture from penetrating, whereby it can be prevented that a leakage current increases abnormally where the voltage difference (Vgs) is lower than a threshold voltage.


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