Clock supply circuit for supplying a processing clock signal used for processing an input signal having a predetermined frequency

Abstract

A clock supply circuit capable of supplying clock signals having different frequencies to processing circuits, simplifying the circuit configuration, and realizing a reduction of the power consumption only by using a low frequency external oscillator, wherein a reference clock is multiplied by a multiplication circuit to generate a multiplied clock, the multiplied clock is divided by a predetermined division ratio to generate a clock signal having a desired constant frequency by a receiving clock generating circuit, furthermore, a DSP clock generating circuit generates a clock signal having a variable frequency according to a processing load of a DSP in accordance with a judgment result of a load judgment circuit, so it is possible to supply a clock signal maintained synchronization with received signal as well as a clock signal having a frequency variably controlled in accordance with the processing load.