The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 06, 2005

Filed:

Mar. 14, 2001
Applicants:

Viktor M. Hungerbuehler, Satigny, CH;

Jean-pierre Vittet, Lully, CH;

Jean-françois Goumaz, Genève, CH;

Jean-luc Bolli, Genève, CH;

Yves Maumary, Genève, CH;

Didier Lavanchy, Cheseaux-Noreaz, CH;

Inventors:

Viktor M. Hungerbuehler, Satigny, CH;

Jean-Pierre Vittet, Lully, CH;

Jean-François Goumaz, Genève, CH;

Jean-Luc Bolli, Genève, CH;

Yves Maumary, Genève, CH;

Didier Lavanchy, Cheseaux-Noreaz, CH;

Assignee:

Acqiris, Plan-les-Ouates, CH;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F013/00 ;
U.S. Cl.
CPC ...
Abstract

In a modular data acquisition system (), a module comprises at least one analog-to-digital converter () for converting an analog input signal (IN, IN, IN, IN) into a digital signal (OUT, OUT, OUT, OUT), and a clock generating circuit () for supplying an internal clock signal (). The module further comprises a connector for plugging in a removable connecting element () on the front side of the module () in order to connect it to a synchronization bus connecting several modules in said system. A clock selecting circuit () enables the selection of either a slave-clock status, wherein the converters () are synchronized by an external synchronization signal supplied by said synchronization bus, or of a master-clock status, wherein the converters are synchronized by said internal clock signal which is also used a external synchronization signal on said synchronization bus. Trigger signals can also be transmitted by the synchronization bus and by the connecting elements.


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