The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 06, 2005
Filed:
Oct. 22, 2003
Mysore Purushotham Divakar, San Jose, CA (US);
David Keating, Limerick, IE;
Antoin Russell, Co. Limerick, IE;
Mysore Purushotham Divakar, San Jose, CA (US);
David Keating, Limerick, IE;
Antoin Russell, Co. Limerick, IE;
Power-One Limited, , KY;
Abstract
A semiconductor chip package that includes a DC—DC converter implemented with a land grid array (LGA) package for interconnection and surface mounting to a printed circuit board. The LGA package integrates all required active components of the DC—DC power converter, including a synchronous buck PWM controller, driver circuits, and MOSFET devices. In particular, the LGA package comprises a substrate having a top surface and a bottom surface, with a DC—DC converter provided on the substrate. The DC—DC converter including at least one power silicon die disposed on the top surface of the substrate. A plurality of electrically and thermally conductive pads are provided on the bottom surface of the substrate in electrical communication with the DC—DC converter through respective conductive vias. The plurality of pads include first pads having a first surface area and second pads having a second surface area, the second surface area being substantially larger than the first surface area. Heat generated by the DC—DC converter is conducted out of the LGA package through the plurality of pads.