The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 06, 2005

Filed:

Mar. 24, 2004
Applicants:

Takeshi Wakamatsu, Saitama, JP;

Shigemitsu Horikawa, Saitama, JP;

Inventors:

Takeshi Wakamatsu, Saitama, JP;

Shigemitsu Horikawa, Saitama, JP;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G01R019/00 ; G11C007/00 ;
U.S. Cl.
CPC ...
Abstract

In order to provide a comparator circuit without generating a malfunction, the comparator circuit according to the present invention may comprise a comparator circuit including a differential amplification circuit having a differential pair transistor (M, M) for inputting a signal as an object of comparison, and a current mirror load circuit (M, M, M, M); a latch circuit having inversion amplifiers that are configured so that an input of one amplifier becomes an input of other amplifier so as to amplify a differential output signal outputted from the current mirror load circuit in accordance with a magnitude relation of the signal as an object of comparison; an equalization transistor (M) for equalizing a signal of the differential amplification circuit; a delay circuit (M, M,M, M) for generating a signal to delay a control signal to be inputted in a control electrode of the equalization transistor; and a control transistor (M) for inputting an output signal of the delay circuit in the control electrode as a control signal to make the latch circuit into an active status and a non-active status.


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