The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 06, 2005

Filed:

Sep. 29, 2004
Applicant:

Meng-yi Hung, Taoyuan Hsien, TW;

Inventor:

Meng-Yi Hung, Taoyuan Hsien, TW;

Assignee:

Quanta Display Inc., Taoyuan, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L029/04 ;
U.S. Cl.
CPC ...
Abstract

A method of fabricating a thin film transistor array is provided. A first patterned conductive layer that distributes over an area range exceeding the designated display region is formed over a substrate. A first dielectric layer is formed over the substrate, wherein the first dielectric layer has the thickness getting smaller toward the edge, so that the first patterned conductive layer outside the designated display region is exposed. A second patterned conductive layer is formed over the first dielectric layer. The second patterned conductive layer and the exposed first patterned conductive layer are electrically connected. A second dielectric layer having a plurality of contact openings therein is formed over the substrate. A plurality of pixel electrodes is formed over the second dielectric layer such that the pixel electrode and the second patterned conductive layer are electrically connected through the contact openings. Finally, various layers outside the designated display regions are removed.


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