The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 30, 2005

Filed:

Jun. 09, 2000
Applicants:

Gerd Vandersteen, Sint-Pieters-Leeuw, BE;

Pierre Wambacq, Groot-Bijgaarden, BE;

Yves Rolain, Halle, BE;

Petr Dobrovolny, Brno, CZ;

Inventors:

Gerd Vandersteen, Sint-Pieters-Leeuw, BE;

Pierre Wambacq, Groot-Bijgaarden, BE;

Yves Rolain, Halle, BE;

Petr Dobrovolny, Brno, CZ;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F017/50 ;
U.S. Cl.
CPC ...
Abstract

Simulation methods and simulators are presented which operate on a computer under software control. Said computer simulation methods and simulators are specially suited for simulating digital circuits and mixed analog digital circuits. The methods enable efficient simulation, meaning resulting in a fast simulation while still obtaining accurate results. With fast simulation is meant that the simulation can be completed in a short simulation time. Accurate means that the signals obtained or determined by simulation are good approximations of the signals that would be measured when the circuit, which representation is under simulation, is actually running in real world. Indeed the simulation methods and the related simulation apparatus or simulator exploits a representation of a circuit.


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