The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 30, 2005
Filed:
Jul. 17, 2003
Kyoung-su Ha, Seoul, KR;
Yong-in Park, Seoul, KR;
Oh-nam Kwon, Uiwang-shi, KR;
Woong-kwon Kim, Gunpo-si, KR;
Jae-beom Choi, Suwon-si, KR;
Kyoung-muk Lee, Seoul, KR;
Kyoung-Su Ha, Seoul, KR;
Yong-In Park, Seoul, KR;
Oh-Nam Kwon, Uiwang-shi, KR;
Woong-Kwon Kim, Gunpo-si, KR;
Jae-Beom Choi, Suwon-si, KR;
Kyoung-Muk Lee, Seoul, KR;
LG. Phillips LCD Co., Ltd., Seoul, KR;
Abstract
An array substrate for a transflective liquid crystal display device, including a substrate; at least one gate line and at least one gate electrode formed on the transparent substrate; a gate-insulating layer formed over the at least one gate line and the at least one gate electrode; a silicon layer formed on the gate-insulating layer, the silicon layer being positioned above the at least one gate electrode; a source electrode and a drain electrode formed on the silicon layer and spaced apart from each other with the silicon layer overlapped therebetween, wherein the at least one gate electrode, the source electrode, the drain electrode, and the silicon layer define a thin film transistor (TFT); at least one data line; a first passivation layer covering the at least one data line; a transparent electrode formed on the first passivation layer; and a reflective electrode formed on the transparent electrode.