Op-amp configurable in a non-inverting mode with a closed loop gain greater than one with output voltage correction for a time varying voltage reference of the op-amp, and a method for correcting the output voltage of such an op-amp for a time varying voltage reference

Abstract

A circuit () comprising eight DACs (to), the analog outputs of which are applied to the non-inverting inputs () of corresponding op-amps (to) for gaining up the analog output voltage from the corresponding DAC (). The op-amps () are identical, and are configured in a non-inverting mode with a closed loop gain of two provided by first and second resistors (R) and (R). Primary outputs () of the op-amps () are coupled to output pins (to) of the circuit (). The second resistors (R) couple primary inverting inputs () of the op-amps () to a common lo voltage reference rail (), which is coupled to a true ground reference pin () through a coupling wire ()which exhibit a combined inherent resistance (R). The voltage reference on the common voltage reference rail () varies with time as the output signals of the pa-amps () vary, and would thus result in cross-talk between the DACs (to). Each op-amp () comprises a secondary differential input amplifier stage (), the non-inverting and inverting inputs () of which are coupled to the common voltage reference rail () and the ground reference pin (), respectively. The secondary differential input stage () provides a secondary current to a node () in the op-amp () in response to variation in the time varying voltage reference for summing with an intermediate current provided through the node () by a primary differential input amplifier stage () of the op-amp () for correcting the output voltage signal on the primary output () for variation in the voltage reference on the common voltage reference rail ().