The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 30, 2005

Filed:

Jul. 08, 2004
Applicants:

Matthias Eichin, Heilbronn, DE;

Alexander Kurz, Schwaebisch Hall, DE;

Inventors:

Matthias Eichin, Heilbronn, DE;

Alexander Kurz, Schwaebisch Hall, DE;

Assignees:

Atmel Germany GmbH, Heilbronn, DE;

Vishay Semiconductor GmbH, Heilbronn, DE;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G01R031/26 ; G01R001/04 ;
U.S. Cl.
CPC ...
Abstract

An integrated circuit can be tested externally at its normal signal output pin(s) without requiring additional testing output pins or test measuring pads. The integrated circuit includes a circuit unit that generates a normal output signal provided to the signal output pin in a normal operating mode and generates a test signal in a testing mode, a switching element that selectively does or does not connect the test signal from the circuit unit to the signal output pin, and a control unit that controls the switching element with a control signal responsive to the potential level present at the signal output pin. When the circuit is to be tested, a defined voltage is applied to the signal output pin by a voltage divider formed of resistors between a supply voltage and a reference voltage. This causes the control unit to close the switching element.


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