The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 23, 2005
Filed:
Aug. 21, 2001
Motohiro Yamazaki, Tokyo, JP;
Motohiro Yamazaki, Tokyo, JP;
Nippon Precision Circuits Inc., Tokyo, JP;
Abstract
Provided is a circuit that has a simple circuit configuration and can detect zero values in a 1-bit digital signal irrespective of a recording medium such as SACD. DSD data forming the 1-bit digital signal are successively sent to a shift register () whose number of stages corresponds to the number of bits of an idle pattern such as '101010101' which appears when assuming a zero value. For example, the shift register () is an 8-bit shift register. An adder () sums up the values at each stages of the shift register (). A zero decision circuit () produces an output indicating decision of zero if the sum value is half of the number of bits. A counter () keeps counting while the output indicating zero decision is being delivered. If the count value of the counter exceeds a given value, the counter produces an output indicating detection of a zero value. In consequence, zero values in a 1-bit digital signal can be detected with a simple circuit configuration, regardless of the idle pattern that varies among different recording media such as SACDs.