The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 23, 2005

Filed:

Oct. 31, 2002
Applicant:

Stefan P. Sywyk, San Jose, CA (US);

Inventor:

Stefan P. Sywyk, San Jose, CA (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03L007/00 ; H03L007/06 ; H03L019/096 ; G11C015/00 ;
U.S. Cl.
CPC ...
Abstract

According to one embodiment, a timing circuit () can include a first control circuit (), a first clocked circuit (), a second clocked circuit (), and a second control circuit (). A first control circuit () may compensate for a first timing signal FCLK making a transition earlier in time than a second timing signal RCLK. A second control circuit () may compensate for a second timing signal RCLK making a transition earlier in time than a first timing signal FCLK. A first timing signal FCLK can be a periodic signal generated by a first PLL type circuit () in response to a falling edge of an external clock signal EXT CLK. A second timing signal RCLK can be a periodic signal generated by a second PLL type circuit () in response to a rising edge of an external clock signal EXT CLK.


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