The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 23, 2005
Filed:
Jul. 18, 2002
Applicant:
Stefan Wallstab, München, DE;
Inventor:
Stefan Wallstab, München, DE;
Assignee:
Infineon Technologies AG, Munich, DE;
Primary Examiner:
Int. Cl.
CPC ...
H03K019/00 ;
U.S. Cl.
CPC ...
Abstract
A circuit for monitoring an entry into a test mode of a chip circuit has a fusible link which can be fired via a firing transistor. A flipflop, which permits access to the test mode, is set by a resulting voltage drop, with the aid of an edge detector. The number of times the test mode has been accessed can be detected from the number of fired fusible links.
Wallstab, Stefan. (2005). Chip card circuit with monitored access to a test mode (U.S. Patent No. 6933742). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6933742
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile