The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 16, 2005

Filed:

Feb. 11, 2002
Applicants:

Wayne W. Ballantyne, Plantation, FL (US);

Robert J. Bero, Spring Grove, IL (US);

Dennis J. Cashen, Lake Zurich, IL (US);

Richard T. Unetich, Lake Forest, IL (US);

Inventors:

Wayne W. Ballantyne, Plantation, FL (US);

Robert J. Bero, Spring Grove, IL (US);

Dennis J. Cashen, Lake Zurich, IL (US);

Richard T. Unetich, Lake Forest, IL (US);

Assignee:

Motorola, Inc., Schaumburg, IL (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F013/00 ;
U.S. Cl.
CPC ...
Abstract

A dual access peripheral interface uses a shared data bus () for communication with dual master units () coupled to a common peripheral device (). Each master control unit provides a shared subset of control bits to a logic configuration block (), which combines the control bits in a logic operation to present to the slave peripheral unit (). The logic configuration block () is configured by configuration bits accessible by only one of the master units (). In this way, both of the master units can access the peripheral at the same time with the logic of the logic configuration block determining the ultimate control of the peripheral.


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