The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 16, 2005

Filed:

Nov. 17, 2000
Applicants:

Hiroyuki Suzuki, Toyokawa, JP;

Hideaki Mizuno, Toyokawa, JP;

Hideyuki Toriyama, Toyokawa, JP;

Nobuo Kamei, Toyokawa, JP;

Tsuyoshi Yoneyama, Toyokawa, JP;

Inventors:

Hiroyuki Suzuki, Toyokawa, JP;

Hideaki Mizuno, Toyokawa, JP;

Hideyuki Toriyama, Toyokawa, JP;

Nobuo Kamei, Toyokawa, JP;

Tsuyoshi Yoneyama, Toyokawa, JP;

Assignee:

Minolta Co., Ltd., Osaka, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06K009/36 ;
U.S. Cl.
CPC ...
Abstract

In an image processing circuit, an area determination section comprises a device having a rewritable circuit configuration such as a field programmable gate array (FPGA). Consequently, the circuit configuration of the area determination section is rewritten, so that the image processing algorithm is changed. Specifically, in the area determination section, a filtering circuit and line memories (for example, FIFO memories) for forming a pixel matrix are formed by using the FPGA, and the configuration of the line memories (the lateral size and the number of lines) and the configuration of the filtering circuit are changed in accordance with a set image processing condition such as the output size or the mode.


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