Zero voltage class ab minimal delay output stage and method

Abstract

A class AB output circuit includes a P-channel pullup transistor (M) having a source coupled to a supply voltage, a drain coupled to an output(), a gate coupled to respond to an input signal on an input(), an N-channel pulldown transistor (M) having a drain coupled to the output, a source coupled to ground, and a gate coupled to respond to the input signal. A first N-channel transistor (M) has a drain coupled to a gate of the output transistor and the supply voltage by means of a current source () and a source coupled to ground by means of a second current source (). A first diode-connected N-channel transistor (M), a second diode-connected N-channel transistor (M), and a first level shifting circuit () are coupled in series between ground and a gate of the N-channel transistor, and a current source () is coupled between the first supply voltage and the gate of the first N-channel transistor. A second level shifting circuit () is coupled between the gate of the pulldown transistor and the source of the first N-channel transistor.