The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 09, 2005

Filed:

Dec. 21, 2001
Applicants:

Yoshiko Furuya, Yamaguchi, JP;

Hiroshi Ichikawa, Ube, JP;

Ryuji Oyama, Ube, JP;

Kazuki Iwashita, Ube, JP;

Koichi Fukuda, Ube, JP;

Inventors:

Yoshiko Furuya, Yamaguchi, JP;

Hiroshi Ichikawa, Ube, JP;

Ryuji Oyama, Ube, JP;

Kazuki Iwashita, Ube, JP;

Koichi Fukuda, Ube, JP;

Assignee:

UBE Industries, Ltd., Yamaguchi, JP;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03H007/46 ; H03H007/00 ;
U.S. Cl.
CPC ...
Abstract

Four frequency components (fto f) (where, ffff) are input into a port () of a first demultiplexing filter circuit (), and demultiplexed into low frequency components (fand f) and high frequency components (fand f), and input in a port () of a second demultiplexing filter circuit () and a port () of a third demultiplexing filter circuit (), respectively. The frequency components (fand f) are demultiplexed into the component (f) and the component (f) by the second demultiplexing filter circuit (), and output from a port () and a port (), respectively. The frequency components (fand f) are demultiplexed into the component (f) and the component (f) by the third demultiplexing filter circuit (), and output from a port () and a port (), respectively. The first demultiplexing filter circuit () comprises a low-pass filter () and a high-pass filter (), the second demultiplexing filter circuit () comprises a low-pass filter () and a combined filter () of a combination of a low-pass filter and a band elimination filter, and the third demultiplexing filter circuit () comprises a combined filter () of a combination of a high-pass filter and a band elimination filter and a high-pass filter (). These demultiplexing filter circuits are formed of a stacked structure.


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