The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 09, 2005

Filed:

Apr. 18, 2003
Applicant:

Akira Yoshino, Kanagawa, JP;

Inventor:

Akira Yoshino, Kanagawa, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L029/76 ;
U.S. Cl.
CPC ...
Abstract

A first diffused layer and a second diffused layer are formed on the major surface of a silicon substrate. A first insulating layer, a second insulating layer or a semiconductor layer, and a third insulating layer are laminated on the major surface of the silicon substrate in the vicinity of the first diffused layer or the second diffused layer and are partially formed. A fourth insulating layer is formed as a gate insulating film. A fifth insulating layer is formed on the side walls of the second insulating layer or the semiconductor layer. In a region of most of a channel, the gate insulating film is formed and a gate electrode is formed so that it covers the gate insulating film and the laminated films. According to this structure, the operating voltage of a flash memory is reduced, the operation is easily sped up and the holding characteristic of information charge can be enhanced.


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Yoshino, Akira. (2005). Nonvolatile semiconductor memory device and its manufacturing method (U.S. Patent No. 6927446). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6927446

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