The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 02, 2005

Filed:

Dec. 03, 2001
Applicants:

Jeff L. Hunter, Missouri City, TX (US);

Mark L. Buser, Green Brook, NJ (US);

Bruce W.c. Lee, Richmond Hill, CA;

Imtaz Ali, Etobicoke, CA;

Inventors:

Jeff L. Hunter, Missouri City, TX (US);

Mark L. Buser, Green Brook, NJ (US);

Bruce W.C. Lee, Richmond Hill, CA;

Imtaz Ali, Etobicoke, CA;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F009/44 ;
U.S. Cl.
CPC ...
Abstract

The invention relates to a method for transparently maintaining cache coherency when debugging a multiple processor system with common shared memory. A software memory map representing the memory usage of the processors in the system to be debugged is created and in the software memory map is an indication of whether or not each processor has a cache. At least two debug sessions associated with two processors are activated. If an active debug session requests a write to a shared memory location, the request is executed and the software memory map is searched to located all processors having read access to that shared memory location. The write request is broadcast to each of the located processors so that each processor can perform any required cache updates.


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