The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 02, 2005
Filed:
Aug. 26, 2003
Shoichi Kawamura, Kawasaki, JP;
Masaru Yano, Kawasaki, JP;
Makoto Niimi, Aichi, JP;
Kenji Nagai, Aichi, JP;
Shoichi Kawamura, Kawasaki, JP;
Masaru Yano, Kawasaki, JP;
Makoto Niimi, Aichi, JP;
Kenji Nagai, Aichi, JP;
Fujitsu Limited, Kawasaki, JP;
Abstract
The present invention is a memory circuit, comprises: a memory cell array including a plurality of bit lines, a plurality of word lines, and a plurality of memory cells disposed in the positions of intersection between the bit lines and the word lines; and a page buffer, which is connected to the bit line and which detects memory cell data by judging with predetermined sense timing the potential of the bit line when a pre-charged bit line potential is discharged in accordance to a cell current of a selected memory cell. Further the sense timing differs in accordance with the position of the selected memory cell in the memory cell array.