The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 02, 2005

Filed:

May. 13, 2004
Applicant:

Satoru Tomita, Kawagoe, JP;

Inventor:

Satoru Tomita, Kawagoe, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02F001/1343 ;
U.S. Cl.
CPC ...
Abstract

An array substrate is provided for which an OS inspection can be performed without increasing the area of a signal driving circuit formed on the array substrate, and for which the manufacturing cost can be reduced. The array substrate includes a substrate, scanning lines, signal lines, pixel electrodes connected via switching elements provided at the intersections of the scanning lines and the signal lines, a plurality of input/output terminals provided at an edge portion of the substrate, a scanning line driving circuit, a signal line driving circuit for supplying picture signals sent from the outside to one ends of the signal lines via the input/output terminals, and a wiring line commonly connecting the other ends of the signal lines to at least one of the input/output terminals. A predetermined level of voltage is applied between the input/output terminal to which the wiring line is connected and another input/output terminal which at least supplies picture signals, and a current flowing at that time is measured to detect failures.


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