The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 02, 2005

Filed:

Sep. 25, 2001
Applicants:

Nandini Ramani, Saratoga, CA (US);

David C. Kehlet, Los Altos, CA (US);

Michael G. Lavelle, Saratoga, CA (US);

Mark E. Pascual, San Jose, CA (US);

Ewa M. Kubalska, San Jose, CA (US);

Yi-ming Tian, Mountain View, CA (US);

Inventors:

Nandini Ramani, Saratoga, CA (US);

David C. Kehlet, Los Altos, CA (US);

Michael G. Lavelle, Saratoga, CA (US);

Mark E. Pascual, San Jose, CA (US);

Ewa M. Kubalska, San Jose, CA (US);

Yi-Ming Tian, Mountain View, CA (US);

Assignee:

Sun Microsystems, Inc., Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G09G005/00 ;
U.S. Cl.
CPC ...
Abstract

A system and method for rasterizing and rendering graphics data is disclosed. Vertices may be grouped to form primitives such as triangles, which are rasterized using two-dimensional arrays of samples bins. To overcome fragmentation problems, the system's sample evaluation hardware may be configured to over-evaluate samples each clock cycle. Since a number of the samples will typically not survive evaluation because they will be outside the primitive being rendered, the remaining surviving samples may be combined into sets, with one set being forwarded to subsequent pipeline stages each clock cycle in order to attempt to keep the pipeline utilization high.


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