The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 02, 2005

Filed:

Dec. 09, 2003
Applicants:

John Wynne, Limerick, IR;

Donal P. Geraghty, Limerick, IR;

Albert C. O'grady, Mungret, IR;

Inventors:

John Wynne, Limerick, IR;

Donal P. Geraghty, Limerick, IR;

Albert C. O'Grady, Mungret, IR;

Assignee:

Analog Devices, Inc., Norwood, MA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03M001/66 ;
U.S. Cl.
CPC ...
Abstract

A multi-channel circuit () comprising a plurality of on-chip channels (CHto CH), each of which comprises a DAC () for converting digital data into analogue output signals independently of each other under the control of an interface and control logic circuit (). The analogue output signals from the DACs () are outputted on output terminals () of the respective channels (CHto CH). The digital input data and control and address signals for controlling the conversion of the digital data in the DACs () are inputted to the interface and control logic circuit () through an I/O port (). DAC registers () are provided in the respective channels (CHto CH) for storing the digital words to be converted in the corresponding DACs (). Analogue input terminals () are provided for receiving analogue input signals (), for example, analogue signals from external systems which may be controlled by the output signals from the DACs (). A multiplexer () is operable under the control of the interface and control logic circuit () for selectively and sequentially applying the analogue output signals from the DACs () and the analogue input signals from the analogue input terminals () to a monitoring output terminal () for facilitating independent monitoring of the analogue output signals from the DACs (), and the analogue inputs on the analogue input terminals ().


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