The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 02, 2005
Filed:
Dec. 24, 2002
Shoichi Masui, Kawasaki, JP;
Michiya Oura, Kawasaki, JP;
Tsuzumi Ninomiya, Kawasaki, JP;
Wataru Yokozeki, Kawasaki, JP;
Kenji Mukaida, Kawasaki, JP;
Shoichi Masui, Kawasaki, JP;
Michiya Oura, Kawasaki, JP;
Tsuzumi Ninomiya, Kawasaki, JP;
Wataru Yokozeki, Kawasaki, JP;
Kenji Mukaida, Kawasaki, JP;
Fujitsu Limited, Kawasaki, JP;
Abstract
A programmable logic device with ferroelectric configuration memories storing multiple configuration data sets. The device has programmable logic blocks, interconnections, and I/O blocks to provide desired logic functions. Those building blocks can be dynamically reconfigured by changing the selection of configuration data stored in the device's integral configuration memories. The configuration memories are divided into groups, so that they can be loaded concurrently with multiple configuration data streams. To protect the content of configuration memories from unauthorized access, the device employs an authentication mechanism that uses security IDs stored in the configuration memories. The device has a memory controller to provide an appropriate power supply sequence for ferroelectric memory cells to ensure the reliable data retention when the device is powered up or shut down.