The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 26, 2005
Filed:
Mar. 31, 2003
Theodore J. Bohizic, Hyde Park, NY (US);
Mark H. Decker, Rhinebeck, NY (US);
Ali Y. Duale, Poughkeepsie, NY (US);
Shailesh Ratilal Gami, Poughkeepsie, NY (US);
Vincent L. Ip, New York, NY (US);
Dennis W. Wittig, New Paltz, NY (US);
Theodore J. Bohizic, Hyde Park, NY (US);
Mark H. Decker, Rhinebeck, NY (US);
Ali Y. Duale, Poughkeepsie, NY (US);
Shailesh Ratilal Gami, Poughkeepsie, NY (US);
Vincent L. Ip, New York, NY (US);
Dennis W. Wittig, New Paltz, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method for a method for testing the validity of shared data in a multiprocessing system is disclosed. The method comprises receiving at a first central processing unit a list of fetch and store instructions associated with blocks in a shared memory location. The list includes a data value, a central processing unit identifier and a relative order associated with the instructions. In addition, one of the data values associated with one of the instructions was stored by a memory-to-memory, memory-to-register or register-to-memory operation. Further, one of the central processing unit identifiers associated with one of the instructions is an identifier corresponding to one of a plurality of central processing units that have access to the shared memory location including the first central processing unit. A fetch operation is performed at a block in the shared memory location from the first central processing unit. Fetched data is received at the first central processing unit in response to the performing, where the fetched data was stored by one of the plurality of central processing units. The method verifies that the fetched data conforms to a block concurrency rule in response to the list and that the fetched data conforms to a serialization rule in response to the list.