System and method for reducing soft error rate utilizing customized epitaxial layers

Abstract

The present invention is directed to a built-in solution for soft error protection by forming an epitaxial layer with a graded dopant concentration. By grading a dopant concentration, starting from a first dopant concentration and ending with a second dopant concentration at the device layer, usually determined by the characteristics of the device to be built in the device layer, a constant electric field (ε-field) results from the changing dopant concentration. The creation of this ε-field influences the stray, unwanted charges (or transient charges) away from critical device components. Charges that are created in the epitaxial layer are sweep downward, toward, and sometimes into, the substrate where they are absorbed, thus unable to cause a soft error in the device. The graded layer may be formed over the substrate and at a started dopant concentration different then that in the substrate itself, thereby further influencing the character of the electric field by creating a thin, but rather intense ε-field at the interface junction between the epitaxial layer and the substrate. A graded epitaxial layer may also be used in conjunction with a P+ substrate by interposing an intrinsic layer between the device layer and the substrate. An even higher reduction is soft error rates are with P− substrates in which a buried n-layer is formed between the substrate and the intrinsic layer. The addition of the n-layer causes a pair of additional electric fields to be created at the junction interfaces between the substrate and the intrinsic layer.