The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 05, 2005

Filed:

Aug. 12, 2004
Applicant:

Masafumi Shigaki, Kawasaki, JP;

Inventor:

Masafumi Shigaki, Kawasaki, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03G003/20 ;
U.S. Cl.
CPC ...
Abstract

A signal is sampled at a stage following a first amplifier circuit () and preceding a second amplifier circuit (), and the presence or absence of a signal is detected by a detector circuit (). When the presence of a signal is detected, a gate bias circuit () switches a gate bias for FETs in the second amplifier circuit () to a normal operating voltage value, and when the signal is no longer detected, the gate bias is switched to a voltage value that reduces power consumption, after a mask time has elapsed. In a distortion feedback-type high-frequency amplifier circuit, a means for cutting off a circuit portion for the adjustment of each of a distortion extracting circuit and an inverse distortion adding circuit is achieved by switching FET gate voltage so as to put the corresponding amplifier in a virtually cutoff condition.


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