The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 28, 2005
Filed:
Oct. 06, 2004
Ryo Kobayashi, Tokyo, JP;
Koki Ito, Tokyo, JP;
Ryo Kobayashi, Tokyo, JP;
Koki Ito, Tokyo, JP;
TDK Corporation, Tokyo, JP;
Abstract
A multilayer capacitor includes a multilayer body as a main body of the multilayer capacitor, in which a plurality of internal electrodes and stacked dielectric layers each interposed between the internal electrodes are disposed, being stacked in a stack direction, and dielectrics are disposed on an outer periphery side of the plural internal electrodes, wherein: a pair of upper and lower margin portions in which no internal electrode exists are disposed respectively between end faces positioned in the stack direction of the multilayer body and the internal electrodes that are the closest to the end faces positioned in the stack direction; a pair of right and left margin portions in which no internal electrode exists are disposed respectively between end faces positioned in a direction intersecting the stack direction of the multilayer body and end portions of the internal electrodes; and dimensions of the upper and lower margin portions and dimensions of the right and left margin portions are all 50 μm to 200 μm, and a difference between the dimensions of the upper and lower margin portions and the dimensions of the right and left margin portions is within 20% of the dimensions of the upper and lower margin portions. Therefore, a multilayer capacitor is obtained that not only realizes both downsizing and higher capacity but also is excellent in thermal stress resistance even when a large number of layers of internal electrodes are stacked.