Current switching type of high-speed logic circuit which generates output pair of differential signals each having accurately matched rise-time and fall-time waveform characteristics

Abstract

A two-input logic gate circuit suitable for extremely high-speed operation, which operates on two differential signal pairs expressing respective logic inputs, includes a control signal generating circuit which converts the input differential signal pairs to two sets of differential control signal pairs respectively having first and second level ranges, to be supplied to a current switching section. The current switching section includes first and second switching stages each formed of two source-coupled FET pairs, with differential control signal pairs of the first and second level ranges being applied to FET pairs of the first and second switching stages respectively, with the current switching section thereby selectively establishing current paths to generate a differential signal pair at two load resistors such that each signal of that differential pair results from switching of currents flowing in an identical number of paths, and with each path passing via an identical number of FETs into respective current sources, thereby enabling an output differential signal pair to be obtained in which each signal has identical rise-time and fall-time characteristics.