The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 28, 2005

Filed:

Jun. 15, 2000
Applicant:

Akio Itoh, Kanagawa, JP;

Inventor:

Akio Itoh, Kanagawa, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L027/108 ;
U.S. Cl.
CPC ...
Abstract

There is provided a semiconductor device which is manufactured via steps of forming a capacitor which is obtained by forming in sequence an upper electrode, a dielectric film formed of ferroelectric material or high-dielectric material, and a lower electrode on a semiconductor substrate, then forming an interlayer insulating film on the capacitor, then planarizing a surface of the interlayer insulating film by the CMP polishing, then removing a moisture attached to a surface of the interlayer insulating film or a moisture contained in the interlayer insulating film by applying the plasma annealing using an NO gas, and then forming a redeposited interlayer film on the interlayer insulating film.


Find Patent Forward Citations

Itoh, Akio. (2005). Semiconductor memory device having planarized upper surface and a sion moisture barrier (U.S. Patent No. 6911686). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6911686

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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