The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 21, 2005
Filed:
Aug. 23, 2000
Bart Reynolds, Seattle, WA (US);
Cheng-i Chuang, Saratoga, CA (US);
Chukwuweta Chukwudebe, Berkeley, CA (US);
Sridhar Krishnamurthy, San Jose, CA (US);
Damon Mccormick, Mountain View, CA (US);
Tom Shui, Mountain View, CA (US);
Kai Zhu, Palo Alto, CA (US);
Bart Reynolds, Seattle, WA (US);
Cheng-I Chuang, Saratoga, CA (US);
Chukwuweta Chukwudebe, Berkeley, CA (US);
Sridhar Krishnamurthy, San Jose, CA (US);
Damon McCormick, Mountain View, CA (US);
Tom Shui, Mountain View, CA (US);
Kai Zhu, Palo Alto, CA (US);
Xilinx, Inc., San Jose, CA (US);
Abstract
In one embodiment, a method for specifying addressability in a memory-mapped device is disclosed. A data access primitive is used to model addressablity for the memory-mapped device. Addressability comprises an address matching function, a lane matching function and one or more bus connections. A first starting address for the memory-mapped device is specified. A first set of addressing matching function, lane matching function and one or more bus connections for the memory-mapped device is generated using the data access primitive and the first starting address.