The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 21, 2005
Filed:
Jul. 03, 2001
Detlef Weber, Grünberg, DE;
Detlef Weber, Grünberg, DE;
Infineon Technologies AG, Munich, DE;
Abstract
The present invention provides a metallization arrangement for a semiconductor structure () having a first substructure plane (M), preferably a first metallization plane; a second metallization plane (M) having a first and a second adjacent interconnect (LBA; LBB); a first intermediate dielectric (ILD) for mutual electrical insulation of the first substructure plane (M) and second metallization plane (M); and via holes (V) filled with a conductive material (FM) in the intermediate dielectric (ILD) for connecting the first substructure plane (M) and second metallization plane (M). A liner layer (L) made of a dielectric material is provided under the second metallization plane (M), which liner layer is interrupted in the interspace (O) between the first and second adjacent interconnects (LBA; LBB) of the second metallization plane (M). The invention likewise provides a corresponding fabrication method.