The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 14, 2005
Filed:
Sep. 27, 2001
Michael R Lindsay, Commerce Township, MI (US);
John R Dombrowski, Dearborn Heights, MI (US);
David R Derain, Walled Lake, MI (US);
Alan R Ward, Troy, MI (US);
Mary Joyce, Farmington Hills, MI (US);
Michael D Hesse, Dearborn Heights, MI (US);
Madhu B Banerjee, Bloomfield Hills, MI (US);
Michael R Lindsay, Commerce Township, MI (US);
John R Dombrowski, Dearborn Heights, MI (US);
David R DeRain, Walled Lake, MI (US);
Alan R Ward, Troy, MI (US);
Mary Joyce, Farmington Hills, MI (US);
Michael D Hesse, Dearborn Heights, MI (US);
Madhu B Banerjee, Bloomfield Hills, MI (US);
DaimlerChrysler Corporation, Auburn Hills, MI (US);
Abstract
An apparatus for determining the validity of a data signal communicated between two microprocessors by a dual port RAM includes a sender for providing a data signal and an initialization status indicator and a dual port RAM in communication with the sender for receiving the data signal and the initialization status indicator. The RAM has a first location for storing the data signal and a second location for storing the initialization status indicator. The sender performs initialization on the RAM at the beginning of a data transfer cycle which includes a plurality of data transfer from the sender to a receiver. The sender updates the initialization status indicator as the initialization progresses. The receiver reads the initialization status of the RAM from the second location and subsequently reads the data signal from the first location in association with the initialization status of the RAM.