The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 14, 2005
Filed:
Jan. 08, 2004
Hyun-jae Kim, Seongnam, KR;
Sook-young Kang, Seoul, KR;
Dong-byum Kim, Seoul, KR;
Su-gyeong Lee, Seoul, KR;
Myung-koo Kang, Seoul, KR;
Hyun-Jae Kim, Seongnam, KR;
Sook-Young Kang, Seoul, KR;
Dong-Byum Kim, Seoul, KR;
Su-Gyeong Lee, Seoul, KR;
Myung-Koo Kang, Seoul, KR;
Samsung Electronics Co., Ltd., Suwon, KR;
Abstract
A method of manufacturing a thin film transistor array panel is provided, which includes: depositing an amorphous silicon layer on an insulating substrate; converting the amorphous silicon layer to a polysilicon layer by a plurality of laser shots using a mask; forming a gate insulating layer on the polysilicon layer; forming a plurality of gate lines on the gate insulating layer; forming a first interlayer insulating layer on the gate lines; forming a plurality of data lines on the first interlayer insulating layer; forming a second interlayer insulating layer on the data lines; and forming a plurality of pixel electrodes on the second interlayer insulating layer, wherein the mask comprises a plurality of transmitting areas and a plurality of blocking areas arranged in a mixed manner.