The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 14, 2005
Filed:
Apr. 07, 2003
Kenji Maeda, Osaka, JP;
Takashi Takata, Shiga, JP;
Takao Ochi, Shiga, JP;
Hiroki Naraoka, Osaka, JP;
Takeshi Kawabata, Shiga, JP;
Yoshiyuki Arai, Kyoto, JP;
Shigeru Nonoyama, Osaka, JP;
Hajime Homma, Osaka, JP;
Kenji Maeda, Osaka, JP;
Takashi Takata, Shiga, JP;
Takao Ochi, Shiga, JP;
Hiroki Naraoka, Osaka, JP;
Takeshi Kawabata, Shiga, JP;
Yoshiyuki Arai, Kyoto, JP;
Shigeru Nonoyama, Osaka, JP;
Hajime Homma, Osaka, JP;
Matsushita Electric Industrial Co., Ltd., Osaka, JP;
Abstract
A semiconductor chip is mounted on a first surface of a substrate, the substrate having wiring formed on the first surface, so that a circuit formation surface of the semiconductor chip faces the first surface of the substrate and that electrodes provided on the circuit formation surface are connected with the wiring. A sealing resin layer is then formed on the first surface of the substrate to cover the semiconductor chip. The sealing resin layer and the semiconductor chip are ground starting from a surface opposite to the circuit formation surface to thin the semiconductor chip.