The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 14, 2005
Filed:
Feb. 28, 2002
Applicants:
Gary J. Kovar, Austin, TX (US);
Patrick B. Cochran, Dripping Springs, TX (US);
Tim V. Pham, Austin, TX (US);
Inventors:
Gary J. Kovar, Austin, TX (US);
Patrick B. Cochran, Dripping Springs, TX (US);
Tim V. Pham, Austin, TX (US);
Assignee:
Frrescale Semiconductor, Inc., Austin, TX (US);
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L021/66 ;
U.S. Cl.
CPC ...
Abstract
A packaged array () having a temporary substrate () is used to test a plurality of semiconductor devices (). In one embodiment, the temporary substrate () is an adhesive substrate, such as tape. A support structure () may lie over the temporary substrate () or be within the temporary substrate (). The plurality of semiconductor devices () lie within an array (or) and may be tested in parallel. One array or a multiple number of arrays may lie on the packaged array ().