Programmable first-in first-out (fifo) memory buffer for concurrent data stream handling

Abstract

A programmable FIFO receives a stream of data to be buffered within the FIFO and then output from the FIFO. The programmable FIFO includes the ability to receive program instructions from an application or control circuit to perform specific operations on the stream of data before the data is provided as an output from the programmable FIFO. By performing the specific operations of the program instructions, the programmable FIFO has the ability to filter the stream of data as it passes through the FIFO, including reordering data within the FIFO, if appropriate, and also to synchronize the input and output of the stream of data with external input and output signals, respectively. The programmable FIFO also has the ability to operate as a typical FIFO and buffer the data without manipulating it. The programmable FIFO includes a programmable element and a FIFO memory and control circuit. The stream of data is stored within the FIFO memory and control circuit and then output in the appropriate order, depending on the program instructions. The programmable element includes a program memory in which the program instructions are stored and an execution unit which executes and performs the specific operations on the stream of data. Preferably, the programmable FIFO is implemented within a device configured for coupling to an IEEE 1394-2000 serial bus network. Alternatively, the programmable FIFO is implemented as a separate dedicated device within the IEEE 1394-2000 serial bus network.