The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 07, 2005

Filed:

Aug. 01, 2002
Applicants:

Sei-seung Yoon, Cupertino, CA (US);

Jin-man Han, Menlo Park, CA (US);

Seong-ook Jung, Cupertino, CA (US);

Inventors:

Sei-Seung Yoon, Cupertino, CA (US);

Jin-Man Han, Menlo Park, CA (US);

Seong-Ook Jung, Cupertino, CA (US);

Assignee:

T-Ram, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C011/00 ;
U.S. Cl.
CPC ...
Abstract

A sensing circuit including a sense amplifier to resolve a data signal generated by a memory cell is disclosed herein. The sensing circuit includes a bit line to receive the data signal, a first pre-charge device coupled to the bit line and configured to pre-charge the bit line, a device for providing a bias coupled to the bit line and configured to provide a bias to the bit line, and a reference node configured to be at least one pre-determined level. In one embodiment the pre-determined level is equal to a low potential such as ground and in another embodiment equal to a high potential such as V. One or more switching devices allows for the activation or deactivation of the pre-charge device allowing to pre-charge the bit line to a certain potential and the sensing circuit quickly and accurately determines whether a logical state of '1' or '0' is being applied to the bit line.


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