The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 07, 2005
Filed:
Sep. 17, 2003
Applicants:
Yuri Mirgorodski, Sunnyvale, CA (US);
Vladislav Vashchenko, Palo Alto, CA (US);
Peter J. Hopper, San Jose, CA (US);
Douglas J. Brisbin, San Jose, CA (US);
Inventors:
Yuri Mirgorodski, Sunnyvale, CA (US);
Vladislav Vashchenko, Palo Alto, CA (US);
Peter J. Hopper, San Jose, CA (US);
Douglas J. Brisbin, San Jose, CA (US);
Assignee:
National Semiconductor Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C016/00 ;
U.S. Cl.
CPC ...
Abstract
A method of programming a PMOS stacked gate memory cell is provided that utilizes the correlation between injection current and substrate current during the programming cycle to provide a feedback correction to the control gate of the memory cell to compensate for the negative potential shift on the floating gate as a result of its charging time.