The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 07, 2005
Filed:
Apr. 29, 2002
Kenichi Maruhashi, Tokyo, JP;
Masaharu Ito, Tokyo, JP;
Keiichi Ohata, Tokyo, JP;
Kazuhiro Ikuina, Tokyo, JP;
Takeya Hashiguchi, Tokyo, JP;
Kenichi Maruhashi, Tokyo, JP;
Masaharu Ito, Tokyo, JP;
Keiichi Ohata, Tokyo, JP;
Kazuhiro Ikuina, Tokyo, JP;
Takeya Hashiguchi, Tokyo, JP;
NEC Corporation, Tokyo, JP;
Abstract
A high frequency circuit substrate comprises a first high frequency circuit substrate including at least a first dielectric material layer, a first conductor layer, a second dielectric material layer and a second conductor layer, which are laminated in the named order, the first conductor layer having a first slot formed therein, and the second conductor layer forming a transmission line, the first dielectric material layer having a first opening exposing the first slot at its bottom. The high frequency circuit substrate also comprises a second high frequency circuit substrate including at least a third dielectric material layer, a third conductor layer, a fourth dielectric material layer and a fourth conductor layer, which are laminated in the named order, the third conductor layer having a second slot formed therein, and the fourth conductor layer forming a transmission line, the third dielectric material layer having a second opening exposing the second slot at its bottom. The first high frequency circuit substrate and the first high frequency circuit substrate are bonded to each other in such a manner that the first dielectric material layer and the third dielectric material layer are faced to each other and the first slot and the second slot are electromagnetically coupled, by inserting one side and the other side of a conductor plate having a through hole into the first opening and the second opening, respectively.