The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 07, 2005
Filed:
May. 16, 2003
Nobuaki Tsuji, Hamamatsu, JP;
Masao Noro, Hamamatsu, JP;
Kunihiko Mitsuoka, Iwata, JP;
Yasuhiko Sekimoto, Hamakita, JP;
Masamitsu Hirano, Hamamatsu, JP;
Nobuaki Tsuji, Hamamatsu, JP;
Masao Noro, Hamamatsu, JP;
Kunihiko Mitsuoka, Iwata, JP;
Yasuhiko Sekimoto, Hamakita, JP;
Masamitsu Hirano, Hamamatsu, JP;
Yamaha Corporation, Hamamatsu, JP;
Abstract
An input signal (SIN) is inverted by an inverter (), and the inverted input signal is entered into a tri-state type inverter (). An output portion of this inverter is connected via a delay path () to an input portion of an operational amplifier (). This operational amplifier owns a hysteresis characteristic with respect to a signal entered thereinto. An exclusive-OR gate circuit () controls to set the output state of the inverter to a low impedance state upon receipt of a signal (S) obtained by inverting the input signal, and controls to set the output state of the inverter to a high impedance state upon receipt of a signal (S) output from the operational amplifier. As a result, an amplitude of a signal (S) is limited to a constant amplitude in response to the hysteresis characteristic of the operational amplifier (), and a delay time is made constant.