The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 07, 2005
Filed:
Jan. 16, 2004
Chih-feng Huang, Jhubei, TW;
Ta-yung Yang, Milpitas, CA (US);
Jenn-yu G. Lin, Taipei, TW;
Tuo-hsin Chien, Tucheng, TW;
Chih-Feng Huang, Jhubei, TW;
Ta-yung Yang, Milpitas, CA (US);
Jenn-yu G. Lin, Taipei, TW;
Tuo-Hsin Chien, Tucheng, TW;
System General Corp., Taipei Hsien, TW;
Abstract
The isolated high-voltage LDMOS transistor according to the present invention includes a split N-well and P-well in the extended drain region. The P-well is split in the extended drain region of the N-well to form a split junction-field in the N-well. The split N-well and P-well deplete the drift region, which shifts the electric field maximum into the bulk of the N-well. This achieves a higher breakdown voltage and allows the N-well to have a higher doping density. Furthermore, the LDMOS transistor according to the present invention includes a N-well embedded beneath the source diffusion region. This creates a low-impedance path for the source region, which restricts the transistor current flow between the drain region and the source region.