The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 07, 2005

Filed:

Nov. 21, 2001
Applicants:

Toshiya Yokogawa, Nara, JP;

Asamira Suzuki, Moriguchi, JP;

Masahiro Deguchi, Hirakata, JP;

Shigeo Yoshii, Hirakata, JP;

Hiroyuki Furuya, Kadoma, JP;

Inventors:

Toshiya Yokogawa, Nara, JP;

Asamira Suzuki, Moriguchi, JP;

Masahiro Deguchi, Hirakata, JP;

Shigeo Yoshii, Hirakata, JP;

Hiroyuki Furuya, Kadoma, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L031/0328 ; H01L031/0336 ; H01L031/072 ; H01L031/109 ;
U.S. Cl.
CPC ...
Abstract

A HEMT has an InAlAs layer (), an InGaAs layer (), a multiple δ-doped InAlAs layer () composed of n-type doped layers () and undoped layers () which are alternately stacked, an InP layer (), a Schottky gate electrode (), a source electrode (), and a drain electrode () on an InP substrate (). When a current flows in a region (channel region) of the InGaAs layer () adjacent the interface between the InGaAs layer () and the multiple δ-doped InAlAs layer (), a breakdown voltage in the OFF state can be increased, while resistance to the movement of carriers passing through the multiple δ-doped InAlAs layer () as a carrier supplying layer is reduced.


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