The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 07, 2005
Filed:
Jul. 29, 2002
Diane Lai, Corvallis, OR (US);
Samson Berhane, Corvallis, OR (US);
Barry C. Snyder, Bend, OR (US);
Ronald A. Hellekson, Eugene, OR (US);
Hubert Vander Plas, Palo Alto, CA (US);
Diane Lai, Corvallis, OR (US);
Samson Berhane, Corvallis, OR (US);
Barry C. Snyder, Bend, OR (US);
Ronald A. Hellekson, Eugene, OR (US);
Hubert Vander Plas, Palo Alto, CA (US);
Hewlett-Packard Development Company, L.P., Houston, TX (US);
Abstract
A method of manufacturing a microelectronics device is provided, wherein the microelectronics device is formed on a substrate having a frontside and a backside. The method comprises forming a circuit element on the frontside of the substrate from a plurality of layers deposited on the frontside of the substrate, wherein the plurality of layers includes an intermediate electrical contact layer, and forming an interconnect structure after forming the electrical contact layer. The interconnect structure includes a contact pad formed on the backside of the substrate, and a through-substrate interconnect in electrical communication with the contact pad, wherein the through-substrate interconnect extends from the backside of the substrate to the electrical contact layer.