The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 31, 2005
Filed:
Sep. 24, 2003
Applicant:
Ryu Shimizu, Gifu, JP;
Inventor:
Ryu Shimizu, Gifu, JP;
Assignee:
Sanyo Electric Co., Ltd., Osaka, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L021/4763 ;
U.S. Cl.
CPC ...
Abstract
When forming the interconnect trench by 'via first' method of the dual damascene process, after providing a via hole in the interlayer dielectric film, the anti-reflection coatingand the resist layerare formed such that whichever has a faster etching rate in the formation process of the interconnect trench, out of the anti-reflection coatingand the resist layer, is disposed at the same level as a bottom portion of the interconnect trench to be formed through the formation process thereof.
Shimizu, Ryu. (2005). Method of manufacturing a semiconductor device including a multi-layer interconnect structure (U.S. Patent No. 6900125). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6900125
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile