Method for adjusting system clocks using dynamic clock ratio detector to detect clock ratio between clock domain of driver and counting receiver clock domain

Abstract

Disclosed is a method and a computer circuit design for a dynamic clock ratio detector. The detector is used to determine the ratio between two clock domains. The detector has a driverand a receiver, which reside in different clock domains. The driverconstantly produces a ratio clock pulse to the receiver. The ratio-counter in the receiver counts the pulse width based on its local clock cycles. The clock ratio detector has many features, including absorbing the meta-stability effect when the pulse crosses an asynchronous interface. The clock ratio detector prevents output counts oscillation, provides an adjustable ratio-detecting coverage range, a programmable system-parameter generatorand a programmable error reporter