The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 24, 2005

Filed:

Jun. 16, 1999
Applicants:

Onchuen D. Lau, Saratoga, CA (US);

Frank Chui, Sunnyvale, CA (US);

Gene Chui, Campbell, CA (US);

Gary Kipnis, Sunnyvale, CA (US);

Gurmohan Samrao, San Jose, CA (US);

Neil King, Cupertino, CA (US);

Inventors:

Onchuen D. Lau, Saratoga, CA (US);

Frank Chui, Sunnyvale, CA (US);

Gene Chui, Campbell, CA (US);

Gary Kipnis, Sunnyvale, CA (US);

Gurmohan Samrao, San Jose, CA (US);

Neil King, Cupertino, CA (US);

Assignee:

Cisco Technology, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04J003/06 ;
U.S. Cl.
CPC ...
Abstract

A synchronization state for a local clock generating circuit of a first of a number of components of a distributed system is maintained according to a number of local clock cycles recorded between successive occurrences of a global synchronization signal provided to the components within the distributed system. The local clock generating circuit may enters the synchronization state only after observing a predetermined number of occurrences of successive local clock cycles between instances of the global synchronization signal. The local clock generating circuit continues to provide local control signals for the first of the components at time instants corresponding to the number of local clock cycles even after an instance of the global synchronization signal is observed at a time instant corresponding to one local clock cycle more or less than the number of local clock cycles. However, the local clock generating circuit enters an alarm state when the global synchronization signal is observed at time instants corresponding to more than one local clock cycle more or less than the number of local clock cycles.


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