The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 24, 2005
Filed:
Nov. 15, 1998
Timothy M Anderson, Granite Bay, CA (US);
William G Hooper Iii, Orangevale, CA (US);
James L White, Roseville, CA (US);
Timothy M Anderson, Granite Bay, CA (US);
William G Hooper III, Orangevale, CA (US);
James L White, Roseville, CA (US);
Hewlett-Packard Development Company, L.P., Houston, TX (US);
Abstract
A self-test method and system for facilitating reliable and fault-tolerant operation of a multi-peripheral-device enclosure for use in high-availability computer systems. The reliable and fault-tolerant multi-peripheral-device enclosure uses a three-tiered port bypass control strategy for diagnosing and isolating malfunctioning peripheral devices within the multi-peripheral-device enclosure, and uses a similar a three-tiered port bypass control strategy for isolation of the entire multi-peripheral-device enclosure from a communications medium that interconnects the multi-peripheral-device enclosure with one or more host computers. This three-tiered port bypass control strategy is employed by a self-test routine to isolate the multi-peripheral-device enclosure from external processing elements in order to test peripheral devices and other components within the multi-peripheral-device enclosure, and to isolate any detected defective or malfunctioning components.